Certain portable devices, including wireless handsets, notebook computers and personal digital assistants (PDAs), often employ circuitry which runs on two or more different voltage levels. For instance, circuitry utilized with such portable devices may be configured so that a portion of the circuitry, such as, for example, input/output (IO) buffers, runs at a higher voltage level (e.g., about 3.3 volts), as may be supplied by an IO voltage source, while another portion of the circuitry, such as, for example, core logic, runs at a substantially lower voltage level (e.g., about 1.0 volt), as may be supplied by a core voltage source. This difference in voltage levels often necessitates the use of a voltage level translator circuit for interfacing between the multiple voltage levels.
There are many applications which employ bidirectional buffer circuits including an input stage and an output stage. Some bidirectional buffer circuits utilize programmable control signals (e.g, buffer enable, pull-up, pull-down, etc.) generated, for example, by core logic circuitry that are applied to both the input and output stages of the buffer. Each of these control signals requires voltage level translation, typically by way of a voltage level translator circuit, in order to change the voltage level of the signal from the lower core voltage level to the higher voltage level of the IO driver. Unfortunately, however, each voltage level translator circuit consumes a significant amount of chip area in an integrated circuit device, and therefore the number of voltage level translator circuits in the integrated circuit should be minimized.
Accordingly, there exists a need for an improved buffer circuit that does not suffer from one or more of the problems exhibited by conventional buffer circuits.